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| PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR FEATURES * (1) Differential HSTL output * Crystal oscillator interface, 18pF parallel resonant crystal (19.6MHz - 27.2MHz) * Output frequency range: 245MHz - 340MHz * VCO range: 490MHz - 680MHz * RMS phase jitter @ 312.5MHz, using a 25MHz crystal (1.875MHz - 20MHz): 0.41ps (typical) * 3.3V or 2.5V operating supply * -40C to 85C ambient operating temperature GENERAL DESCRIPTION The ICS842031I-01 is an Ethernet Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS842031I-01 uses an 18pF parallel resonant crystal over the range of 19.6MHz - 27.2MHz. For Ethernet applications, a 25MHz crystal is used to generate 312.5MHz. The ICS842031I-01 has excellent <1ps phase jitter performance, over the 1.875MHz - 20MHz integration range. The ICS842031I-01 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. ICS COMMON CONFIGURATION TABLE - 1Gb ETHERNET Inputs Crystal Frequency (MHz) 25 M 25 N 2 Multiplication Value M/N 12.5 Output Frequency (MHz) 312.5 BLOCK DIAGRAM OE Pullup PIN ASSIGNMENT VDDA GND XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VDD Q nQ OE XTAL_IN OSC XTAL_OUT Phase Detector VCO 490MHz - 680MHz N = /2 (fixed) Q nQ ICS842031I-01 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View M = /25 (fixed) The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 842031AGI-01 www.icst.com/products/hiperclocks.html REV. A JUNE 21, 2005 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR Type Power Power Input Input Pullup Description Analog supply pin. Power supply ground. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Output enable pin. When HIGH, Q output is enabled. When LOW, forces Q to HiZ state. LVCMOS/LVTTL interface levels. Differential clock outputs. HSTL interface levels. Core supply pin. TABLE 1. PIN DESCRIPTIONS Number 1 2 3, 4 5 6, 7 8 Name VDDA GND XTAL_OUT, XTAL_IN OE nQ, Q VDD Output Power NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN RPULLUP Parameter Input Capacitance Input Pullup Resistor Test Conditions Minimum Typical 4 51 Maximum Units pF k 842031AGI-01 www.icst.com/products/hiperclocks.html 2 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR 4.6V -0.5V to VDD + 0.5V 50mA 100mA 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD Inputs, VI Outputs, IO Continuous Current Surge Current Package Thermal Impedance, JA Storage Temperature, TSTG TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 TBD TBD Maximum 3.465 3.465 Units V V mA mA TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 2.375 2.375 Typical 2.5 2.5 TBD TBD Maximum 2.625 2.625 Units V V mA mA TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5% OR 2.5V5%, TA = -40C TO 85C Symbol VIH VIL IIH IIL Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current OE OE Test Conditions VDD = 3.3V VDD = 2.5V VDD = 3.3V VDD = 2.5V VDD = VIN = 3.465V or 2.625V VDD = 3.465V or 2.625V, VIN = 0V -150 Minimum 2 1.7 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0.8 0.7 5 Units V V V V A A TABLE 3D. HSTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C Symbol VOH VOL VOX Parameter Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 Output Crossover Voltage; NOTE 2 40 1.2 Test Conditions Minimum Typical 1.6 0.4 60 Maximum Units V V % V VSWING Peak-to-Peak Output Voltage Swing NOTE 1: Outputs terminated with 50 to GND. NOTE 2: Defined with respect to output voltage swing at a given condition. 842031AGI-01 www.icst.com/products/hiperclocks.html 3 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR Test Conditions Minimum Typical 1.3 0.2 40 1.1 60 Maximum Units V V % V TABLE 3E. HSTL DC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C Symbol VOH VOL VOX Parameter Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 Output Crossover Voltage; NOTE 2 Peak-to-Peak Output Voltage Swing VSWING NOTE 1: Outputs terminated with 50 to GND. NOTE 2: Defined with respect to output voltage swing at a given condition. TABLE 4. CRYSTAL CHARACTERISTICS Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level 19.6 Test Conditions Minimum Typical Fundamental 27.2 50 7 1 MHz pF mW Maximum Units TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C Symbol fOUT Parameter Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions 312.5MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum 245 0.41 350 50 Typical Maximum 340 Units MHz ps ps % tjit(O) tR / tF odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section. TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C Symbol fOUT Parameter Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions 312.5MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum 245 0.52 350 50 Typical Maximum 340 Units MHz ps ps % tjit(O) tR / tF odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section. 842031AGI-01 www.icst.com/products/hiperclocks.html 4 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 3.3V 5% 2.5V 5% VDD, VDDA Qx SCOPE VDD, VDDA Qx SCOPE HSTL nQx HSTL nQx GND GND 0V 0V HSTL 3.3V OUTPUT LOAD AC TEST CIRCUIT HSTL 2.5V OUTPUT LOAD AC TEST CIRCUIT Phase Noise Plot nQ Noise Power Q t PW Phase Noise Mask t PERIOD odc = f1 Offset Frequency f2 t PW t PERIOD x 100% RMS Jitter = Area Under the Masked Phase Noise Plot RMS PHASE JITTER OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 80% Clock Outputs 80% VSW I N G 20% tR tF 20% OUTPUT RISE/FALL TIME 842031AGI-01 www.icst.com/products/hiperclocks.html 5 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS842031I-01 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin. 3.3V or 2.5V VDD .01F VDDA .01F 10F 10 FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE The ICS842031I-01 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 25MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. XTAL_IN C1 22p X1 18pF Parallel Cry stal XTAL_OUT C2 22p ICS842031I-01 ICS84332 Figure 2. CRYSTAL INPUt INTERFACE 842031AGI-01 www.icst.com/products/hiperclocks.html 6 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR RELIABILITY INFORMATION TABLE 6. JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP JA by Velocity (Meters per Second) 0 Multi-Layer PCB, JEDEC Standard Test Boards 101.7C/W 1 90.5C/W 2.5 89.8C/W TRANSISTOR COUNT The transistor count for ICS842031I-01 is: 2538 842031AGI-01 www.icst.com/products/hiperclocks.html 7 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR 8 LEAD TSSOP PACKAGE OUTLINE - G SUFFIX FOR TABLE 7. PACKAGE DIMENSIONS SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum Reference Document: JEDEC Publication 95, MO-153 842031AGI-01 www.icst.com/products/hiperclocks.html 8 REV. A JUNE 21, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842031I-01 FEMTOCLOCKSTM CRYSTAL-TO- HSTL CLOCK GENERATOR Marking 3AI01 3AI01 Package 8 lead TSSOP 8 lead TSSOP Shipping Packaging tube 2500 tape & reel Temperature -40C to 85C -40C to 85C TABLE 8. ORDERING INFORMATION Part/Order Number ICS842031AGI-01 ICS842031AGI-01T The aforementioned trademarks, HiPerClockSTM and FemtoClocksTM are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 842031AGI-01 www.icst.com/products/hiperclocks.html 9 REV. A JUNE 21, 2005 |
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